Merge pull request #270 from antmicro/read_systemverilog_alias

Add 'read_systemverilog' command
chipsalliance · Mar 16, 2022 · fb94f80 · fb94f80
2 parents 5c7d58a + 3494b2b
commit fb94f80
Showing 1 changed file with 5 additions and 0 deletions.
diff --git a/uhdm-plugin/uhdmsurelogastfrontend.cc b/uhdm-plugin/uhdmsurelogastfrontend.cc
@@ -78,6 +78,7 @@ std::vector<vpiHandle> executeCompilation(SURELOG::SymbolTable *symbolTable, SUR
 }
 
 struct UhdmSurelogAstFrontend : public UhdmCommonFrontend {
+    UhdmSurelogAstFrontend(std::string name, std::string short_help) : UhdmCommonFrontend(name, short_help) {}
     UhdmSurelogAstFrontend() : UhdmCommonFrontend("verilog_with_uhdm", "generate/read UHDM file") {}
     void print_read_options() override
     {
@@ -129,4 +130,8 @@ struct UhdmSurelogAstFrontend : public UhdmCommonFrontend {
     void call_log_header(RTLIL::Design *design) override { log_header(design, "Executing Verilog with UHDM frontend.\n"); }
 } UhdmSurelogAstFrontend;
 
+struct UhdmSystemVerilogFrontend : public UhdmSurelogAstFrontend {
+    UhdmSystemVerilogFrontend() : UhdmSurelogAstFrontend("systemverilog", "read SystemVerilog files") {}
+} UhdmSystemVerilogFrontend;
+
 YOSYS_NAMESPACE_END