ld: refactor sam0 ldscripts

boards/arduino-mkr-common/Makefile.include

@@ -16,8 +16,9 @@ ifeq ($(PROGRAMMER),jlink)
   include $(RIOTMAKE)/tools/jlink.inc.mk
 else
   # by default, we use BOSSA to flash this board and take into account the
-  # preinstalled Arduino bootloader.
-  export LINKER_SCRIPT ?= $(RIOTCPU)/sam0_common/ldscripts/$(CPU_MODEL)_arduino_bootloader.ld
+  # preinstalled Arduino bootloader. ROM_OFFSET skips the space taken by
+  # such bootloader.
+  ROM_OFFSET ?= 0x2000
   include $(RIOTMAKE)/tools/bossa.inc.mk
 endif
 

boards/feather-m0/Makefile.include

@@ -16,8 +16,9 @@ ifeq ($(PROGRAMMER),jlink)
   include $(RIOTMAKE)/tools/jlink.inc.mk
 else
   # by default, we use BOSSA to flash this board to take into account the
-  # pre-flashed Arduino bootloader
-  export LINKER_SCRIPT ?= $(RIOTCPU)/sam0_common/ldscripts/$(CPU_MODEL)_arduino_bootloader.ld
+  # pre-flashed Arduino bootloader. ROM_OFFSET skips the space taken by
+  # such bootloader.
+  ROM_OFFSET ?= 0x2000
   include $(RIOTMAKE)/tools/bossa.inc.mk
 endif
 

cpu/cortexm_common/Makefile.include

@@ -1,3 +1,14 @@
 # include module specific includes
 INCLUDES += -I$(RIOTCPU)/cortexm_common/include
 INCLUDES += -I$(RIOTCPU)/cortexm_common/include/vendor
+
+ifneq (,$(ROM_OFFSET))
+  LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_rom_offset=$(ROM_OFFSET)
+endif
+
+ifneq (,$(ROM_START_ADDR)$(RAM_START_ADDR)$(ROM_LEN)$(RAM_LEN))
+  LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_rom_start_addr=$(ROM_START_ADDR)
+  LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_ram_start_addr=$(RAM_START_ADDR)
+  LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_rom_length=$(ROM_LEN)
+  LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_ram_length=$(RAM_LEN)
+endif

cpu/cortexm_common/ldscripts/cortexm.ld

@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2017 Inria
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @addtogroup      cpu_cortexm_common
+ * @{
+ *
+ * @file
+ * @brief           Memory definitions for the Cortex-M family
+ *
+ * @author          Francisco Acosta <francisco.acosta@inria.fr>
+ *
+ * @}
+ */
+
+_boot_offset = DEFINED( _rom_offset ) ? _rom_offset : 0x0 ;
+
+MEMORY
+{
+    rom (rx)    : ORIGIN = _rom_start_addr + _boot_offset, LENGTH = _rom_length - _boot_offset
+    ram (rwx)   : ORIGIN = _ram_start_addr,                LENGTH = _ram_length
+}
+
+INCLUDE cortexm_base.ld

cpu/sam0_common/Makefile.include

@@ -1,11 +1,20 @@
 # Define the CPU family so we can differentiate between them in the code
 CFLAGS += -DCPU_FAM_$(shell echo $(CPU_FAM) | tr 'a-z-' 'A-Z_')
 
+# Set ROM and RAM lengths according to CPU model
+ifneq (,$(filter samd21g18a samd21j18a saml21j18b saml21j18a samr21g18a,$(CPU_MODEL)))
+  ROM_LEN ?= 0x40000
+  RAM_LEN ?= 0x8000
+endif
+
+ROM_START_ADDR ?= 0x00000000
+RAM_START_ADDR ?= 0x20000000
+
 # this CPU implementation doesn't use CMSIS initialization
 export CFLAGS += -DDONT_USE_CMSIS_INIT
 
-# for the sam[drl] CPUs we hold all linkerscripts in the sam0 common folder
-export LINKFLAGS += -L$(RIOTCPU)/sam0_common/ldscripts
+# For Cortex-M cpu we use the common cortexm.ld linker script
+LINKER_SCRIPT ?= cortexm.ld
 
 # use common periph functions
 USEMODULE += periph_common