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drivers/mtd_spi_nor: removed Kconfig & added MX/ISSI security features
1 parent 7f550ac commit c293317

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6 files changed

+378
-56
lines changed

6 files changed

+378
-56
lines changed

‎drivers/Kconfig

-1
Original file line numberDiff line numberDiff line change
@@ -56,7 +56,6 @@ endmenu # Sensor Device Drivers
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5757
menu "Storage Device Drivers"
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rsource "mtd_sdcard/Kconfig"
59-
rsource "mtd_spi_nor/Kconfig"
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endmenu # Storage Device Drivers
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endmenu # Drivers

‎drivers/include/mtd_spi_nor.h

+49-20
Original file line numberDiff line numberDiff line change
@@ -36,24 +36,6 @@ extern "C"
3636
{
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#endif
3838

39-
#define STATUS_WIP 0x01u
40-
#define STATUS_WEL 0x02u
41-
#define STATUS_BP0 0x04u
42-
#define STATUS_BP1 0x08u
43-
#define STATUS_BP2 0x10u
44-
#define STATUS_BP3 0x20u
45-
#define STATUS_QE 0x40u
46-
#define STATUS_SRWD 0x80u
47-
48-
#define SECURITY_SOTP 0x01u
49-
#define SECURITY_LDSO 0x02u
50-
#define SECURITY_PSB 0x04u
51-
#define SECURITY_ESB 0x08u
52-
#define SECURITY_XXXXX 0x10u
53-
#define SECURITY_PFAIL 0x20u
54-
#define SECURITY_EFAIL 0x40u
55-
#define SECURITY_WPSEL 0x80u
56-
5739
/**
5840
* @brief SPI NOR flash opcode table
5941
*/
@@ -71,7 +53,7 @@ typedef struct {
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uint8_t chip_erase; /**< Chip erase */
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uint8_t sleep; /**< Deep power down */
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uint8_t wake; /**< Release from deep power down */
74-
uint8_t rdscur; /**< Read security register */
56+
uint8_t security; /**< Read security register */
7557
} mtd_spi_nor_opcode_t;
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7759
/**
@@ -114,6 +96,17 @@ typedef struct __attribute__((packed)) {
11496
*/
11597
#define SPI_NOR_F_SECT_64K (4)
11698

99+
/**
100+
* @brief Flag to set when the device supports the Macronix security register (rdscur opcode)
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*/
102+
#define SPI_NOR_F_MX_SECUR (256)
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/**
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* @brief Flag to set when the device supports the ISSI security/extended read register
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* (rderp opcode)
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*/
108+
#define SPI_NOR_F_ISSI_SECUR (512)
109+
117110
/**
118111
* @brief Compile-time parameters for a serial flash device
119112
*/
@@ -188,7 +181,8 @@ extern const mtd_desc_t mtd_spi_nor_driver;
188181
* The numbers were taken from Micron M25P16, but the same opcodes can
189182
* be found in Macronix MX25L25735E, and multiple other data sheets for
190183
* different devices, as well as in the Linux kernel, so they seem quite
191-
* sensible for default values. */
184+
* sensible for default values.
185+
*/
192186
extern const mtd_spi_nor_opcode_t mtd_spi_nor_opcode_default;
193187

194188
/**
@@ -198,6 +192,41 @@ extern const mtd_spi_nor_opcode_t mtd_spi_nor_opcode_default;
198192
*/
199193
extern const mtd_spi_nor_opcode_t mtd_spi_nor_opcode_default_4bytes;
200194

195+
/**
196+
* @brief Macronix-specific opcodes including security features
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*
198+
* Some Macronix NOR Flashs have a dedicated security register which has flags to indicate
199+
* if the last program/erase operation was successful or not. The RDSCUR opcode is
200+
* used ot access this register, which requires a vendor specific opcode set.
201+
* To utilize this feature, the SPI_NOR_F_MX_SECUR flag has to be set as well.
202+
*/
203+
extern const mtd_spi_nor_opcode_t mtd_spi_nor_opcode_macronix;
204+
205+
/**
206+
* @brief Macronix-specific 4-byte opcodes including security features
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*
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* Commands for 4-byte address chips (above 128Mb)
209+
*/
210+
extern const mtd_spi_nor_opcode_t mtd_spi_nor_opcode_macronix_4bytes;
211+
212+
/**
213+
* @brief ISSI-specific opcodes including security features
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*
215+
* Some ISSI NOR Flashs have a dedicated Extended Read Parameter register which has flags
216+
* to indicate if the last program/erase operation was successful or not.
217+
* The RDERP opcode is used to access this register, which requires a vendor specific
218+
* opcode set.
219+
* To utilize this feature, the SPI_NOR_F_MX_SECUR flag has to be set as well.
220+
*/
221+
extern const mtd_spi_nor_opcode_t mtd_spi_nor_opcode_issi;
222+
223+
/**
224+
* @brief ISSI-specific 4-byte opcodes including security features
225+
*
226+
* Commands for 4-byte address chips (above 128Mb)
227+
*/
228+
extern const mtd_spi_nor_opcode_t mtd_spi_nor_opcode_issi_4bytes;
229+
201230
#ifdef __cplusplus
202231
}
203232
#endif

‎drivers/mtd_spi_nor/Kconfig

-22
This file was deleted.

‎drivers/mtd_spi_nor/include/mtd_spi_nor_defines.h

+232
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,232 @@
1+
/*
2+
* Copyright (C) 2024 Technische Universität Hamburg
3+
*
4+
* This file is subject to the terms and conditions of the GNU Lesser General
5+
* Public License v2.1. See the file LICENSE in the top level directory for more
6+
* details.
7+
*/
8+
9+
/**
10+
* @ingroup drivers_mtd_spi_nor
11+
* @{
12+
*
13+
* @file
14+
* @brief Definitions for the MTD SPI NOR Flash driver
15+
*
16+
* More detailed information about the file and the functionality implemented.
17+
*
18+
* @author Christopher Büchse <christopher.buechse@tuhh.de>
19+
*
20+
*/
21+
22+
#ifndef MTD_SPI_NOR_DEFINES_H
23+
#define MTD_SPI_NOR_DEFINES_H
24+
25+
#ifdef __cplusplus
26+
extern "C" {
27+
#endif
28+
29+
/**
30+
* @name Common Status Bits from the Status Register of SPI NOR Flashs
31+
* @{
32+
*/
33+
/**
34+
* @brief Write In Progress Flag (R)
35+
*
36+
* 0 - Device is ready
37+
* 1 - Write cycle in progress and device is busy
38+
*/
39+
#define SPI_NOR_STATUS_WIP 0x01u
40+
41+
/**
42+
* @brief Write Enable Latch Flag (R/W)
43+
*
44+
* 0 - Device is not write enabled
45+
* 1 - Device is write enabled
46+
*/
47+
#define SPI_NOR_STATUS_WEL 0x02u
48+
49+
/**
50+
* @brief Block Protection Bit 0 Flag (R/W)
51+
*
52+
* 0 - Specific blocks are not write-protected
53+
* 1 - Specific blocks are write-protected
54+
*/
55+
#define SPI_NOR_STATUS_BP0 0x04u
56+
57+
/**
58+
* @brief Block Protection Bit 1 Flag (R/W)
59+
*
60+
* 0 - Specific blocks are not write-protected
61+
* 1 - Specific blocks are write-protected
62+
*/
63+
#define SPI_NOR_STATUS_BP1 0x08u
64+
65+
/**
66+
* @brief Block Protection Bit 2 Flag (R/W)
67+
*
68+
* 0 - Specific blocks are not write-protected
69+
* 1 - Specific blocks are write-protected
70+
*/
71+
#define SPI_NOR_STATUS_BP2 0x10u
72+
73+
/**
74+
* @brief Block Protection Bit 3 Flag (R/W)
75+
*
76+
* 0 - Specific blocks are not write-protected
77+
* 1 - Specific blocks are write-protected
78+
*/
79+
#define SPI_NOR_STATUS_BP3 0x20u
80+
81+
/**
82+
* @brief Quad Enable Flag (R/W)
83+
*
84+
* 0 - Quad output function disabled
85+
* 1 - Quad output function enabled
86+
*/
87+
#define SPI_NOR_STATUS_QE 0x40u
88+
89+
/**
90+
* @brief Status Register Write Disable Flag (R/W)
91+
*
92+
* 0 - Status Register is not write protected
93+
* 1 - Status Register is write protected
94+
*/
95+
#define SPI_NOR_STATUS_SRWD 0x80u
96+
97+
/** @} */
98+
99+
/**
100+
* @name Macronix Style Security Register Bits
101+
* @note These flags were taken from the MX25L51245G datasheet, but probably apply
102+
* to other devices from Macronix as well.
103+
* @{
104+
*/
105+
/**
106+
* @brief Secured OTP Flag
107+
*
108+
* 0 - OTP area not factory locked
109+
* 1 - OTP area factory locked
110+
*/
111+
#define MX_SECURITY_SOTP 0x01u
112+
113+
/**
114+
* @brief Lock-down Secured OTP Flag
115+
*
116+
* 0 - OTP area not (user) locked
117+
* 1 - OTP area locked (can not be programmed/erased)
118+
*/
119+
#define MX_SECURITY_LDSO 0x02u
120+
121+
/**
122+
* @brief Program Suspend Flag
123+
*
124+
* 0 - Program is not suspended
125+
* 1 - Program suspended
126+
*/
127+
#define MX_SECURITY_PSB 0x04u
128+
129+
/**
130+
* @brief Erase Suspend Flag
131+
*
132+
* 0 - Erase is not suspended
133+
* 1 - Erase is suspended
134+
*/
135+
#define MX_SECURITY_ESB 0x08u
136+
137+
/**
138+
* @brief Reserved
139+
*/
140+
#define MX_SECURITY_XXXXX 0x10u
141+
142+
/**
143+
* @brief Program Fail Flag
144+
*
145+
* 0 - Program Operation succeeded
146+
* 1 - Program Operation failed or region is protected
147+
*/
148+
#define MX_SECURITY_PFAIL 0x20u
149+
150+
/**
151+
* @brief Erase Fail Flag
152+
*
153+
* 0 - Erase Operation succeeded
154+
* 1 - Erase Operation failed or region is protected
155+
*/
156+
#define MX_SECURITY_EFAIL 0x40u
157+
158+
/**
159+
* @brief Write Protection Selection Flag
160+
*
161+
* 0 - Normal Write Protect mode
162+
* 1 - Advanced Sector Protection mode
163+
*/
164+
#define MX_SECURITY_WPSEL 0x80u
165+
/** @} */
166+
167+
/**
168+
* @name ISSI Style Security Register Bits from Extended Read Register (ERP)
169+
* @note These flags were taken from the IS25LE01G datasheet, but probably
170+
* apply to other devices from ISSI as well.
171+
* @{
172+
*/
173+
174+
/**
175+
* @brief Reserved
176+
*/
177+
#define IS_SECURITY_XXXXX 0x01u
178+
179+
/**
180+
* @brief Protection Error Flag (R)
181+
*
182+
* 0 - No protection error
183+
* 1 - Protection Error occurred in program or erase
184+
*/
185+
#define IS_SECURITY_PROT_E 0x02u
186+
187+
/**
188+
* @brief Program Error Flag (R)
189+
*
190+
* 0 - Program Operation succeeded
191+
* 1 - Program Operation failed or region is protected
192+
*/
193+
#define IS_SECURITY_P_ERR 0x04u
194+
195+
/**
196+
* @brief Erase Error Flag (R)
197+
*
198+
* 0 - Erase Operation succeeded
199+
* 1 - Erase Operation failed or region is protected
200+
*/
201+
#define IS_SECURITY_E_ERR 0x08u
202+
203+
/**
204+
* @brief Data Learning Pattern Flag (R/W)
205+
*
206+
* 0 - DLP is disabled
207+
* 1 - DLP is enabled
208+
*/
209+
#define IS_SECURITY_DLPEN 0x10u
210+
211+
/**
212+
* @brief Output Driver Strength Bit 0 (R/W)
213+
*/
214+
#define IS_SECURITY_ODS0 0x20u
215+
216+
/**
217+
* @brief Output Driver Strength Bit 1 (R/W)
218+
*/
219+
#define IS_SECURITY_ODS1 0x40u
220+
221+
/**
222+
* @brief Output Driver Strength Bit 2 (R/W)
223+
*/
224+
#define IS_SECURITY_ODS2 0x80u
225+
/** @} */
226+
227+
#ifdef __cplusplus
228+
}
229+
#endif
230+
231+
#endif /* MTD_SPI_NOR_DEFINES_H */
232+
/** @} */

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