diff --git a/cpu/sam0_common/Makefile.include b/cpu/sam0_common/Makefile.include
index 3fb15ce2b3fe0..c3c05d03ab241 100644
--- a/cpu/sam0_common/Makefile.include
+++ b/cpu/sam0_common/Makefile.include
@@ -3,8 +3,8 @@ CFLAGS += -DCPU_FAM_$(shell echo $(CPU_FAM) | tr 'a-z-' 'A-Z_')
 
 # Set ROM and RAM lengths according to CPU model
 ifneq (,$(filter samd21g18a samd21j18a saml21j18b saml21j18a samr21g18a,$(CPU_MODEL)))
-  ROM_LEN = 0x40000
-  RAM_LEN = 0x8000
+  ROM_LEN ?= 0x40000
+  RAM_LEN ?= 0x8000
 endif
 
 ROM_START_ADDR ?= 0x00000000
@@ -13,7 +13,7 @@ RAM_START_ADDR ?= 0x20000000
 # this CPU implementation doesn't use CMSIS initialization
 export CFLAGS += -DDONT_USE_CMSIS_INIT
 
-# For Cortex-M cpu we use the cortexm.ld linker script
+# For Cortex-M cpu we use the common cortexm.ld linker script
 LINKER_SCRIPT ?= cortexm.ld
 
 # use common periph functions