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Copy pathmath_pipeline.bsf
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math_pipeline.bsf
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/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 2023 Intel Corporation. All rights reserved.
Your use of Intel Corporation's design tools, logic functions
and other software and tools, and any partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Intel Program License
Subscription Agreement, the Intel Quartus Prime License Agreement,
the Intel FPGA IP License Agreement, or other applicable license
agreement, including, without limitation, that your use is for
the sole purpose of programming logic devices manufactured by
Intel and sold by Intel or its authorized distributors. Please
refer to the applicable agreement for further details, at
https://fpgasoftware.intel.com/eula.
*/
(header "symbol" (version "1.1"))
(symbol
(rect 16 16 200 192)
(text "math_pipeline" (rect 5 0 58 12)(font "Arial" ))
(text "inst" (rect 8 160 20 172)(font "Arial" ))
(port
(pt 0 32)
(input)
(text "clk" (rect 0 0 10 12)(font "Arial" ))
(text "clk" (rect 21 27 31 39)(font "Arial" ))
(line (pt 0 32)(pt 16 32)(line_width 1))
)
(port
(pt 0 48)
(input)
(text "en" (rect 0 0 9 12)(font "Arial" ))
(text "en" (rect 21 43 30 55)(font "Arial" ))
(line (pt 0 48)(pt 16 48)(line_width 1))
)
(port
(pt 0 64)
(input)
(text "op[3..0]" (rect 0 0 29 12)(font "Arial" ))
(text "op[3..0]" (rect 21 59 50 71)(font "Arial" ))
(line (pt 0 64)(pt 16 64)(line_width 3))
)
(port
(pt 0 80)
(input)
(text "regA[7..0]" (rect 0 0 41 12)(font "Arial" ))
(text "regA[7..0]" (rect 21 75 62 87)(font "Arial" ))
(line (pt 0 80)(pt 16 80)(line_width 3))
)
(port
(pt 0 96)
(input)
(text "regB[7..0]" (rect 0 0 38 12)(font "Arial" ))
(text "regB[7..0]" (rect 21 91 59 103)(font "Arial" ))
(line (pt 0 96)(pt 16 96)(line_width 3))
)
(port
(pt 0 112)
(input)
(text "flags[7..0]" (rect 0 0 38 12)(font "Arial" ))
(text "flags[7..0]" (rect 21 107 59 119)(font "Arial" ))
(line (pt 0 112)(pt 16 112)(line_width 3))
)
(port
(pt 0 128)
(input)
(text "reset" (rect 0 0 20 12)(font "Arial" ))
(text "reset" (rect 21 123 41 135)(font "Arial" ))
(line (pt 0 128)(pt 16 128)(line_width 1))
)
(port
(pt 184 32)
(output)
(text "regC[7..0]" (rect 0 0 40 12)(font "Arial" ))
(text "regC[7..0]" (rect 123 27 163 39)(font "Arial" ))
(line (pt 184 32)(pt 168 32)(line_width 3))
)
(port
(pt 184 48)
(output)
(text "writeR" (rect 0 0 25 12)(font "Arial" ))
(text "writeR" (rect 138 43 163 55)(font "Arial" ))
(line (pt 184 48)(pt 168 48)(line_width 1))
)
(port
(pt 184 64)
(output)
(text "fetchE" (rect 0 0 27 12)(font "Arial" ))
(text "fetchE" (rect 136 59 163 71)(font "Arial" ))
(line (pt 184 64)(pt 168 64)(line_width 1))
)
(port
(pt 184 80)
(output)
(text "outFlg[7..0]" (rect 0 0 43 12)(font "Arial" ))
(text "outFlg[7..0]" (rect 120 75 163 87)(font "Arial" ))
(line (pt 184 80)(pt 168 80)(line_width 3))
)
(port
(pt 184 96)
(output)
(text "flgUpd" (rect 0 0 25 12)(font "Arial" ))
(text "flgUpd" (rect 138 91 163 103)(font "Arial" ))
(line (pt 184 96)(pt 168 96)(line_width 1))
)
(drawing
(rectangle (rect 16 16 168 160)(line_width 1))
)
)