README.md

@@ -1,6 +1,16 @@
 This repository contains a set of C++ classes that can be used to implement inline caches for the input and output global array arguments (i.e. those mapped to external DRAM) of accelerators implemented on FPGAs via high-level synthesis.
 
-The caches, their usage and the corresponding results have been published in <insert citation when ready>.
+The caches, their usage and the corresponding results have been published in the following paper. If you find this work useful for your research, please consider citing:
+
+    @ARTICLE{8030985, 
+     author={L. Ma and L. Lavagno and M. T. Lazarescu and A. Arif}, 
+     journal={IEEE Access}, 
+     title={Acceleration by Inline Cache for Memory-Intensive Algorithms on FPGA via High-Level Synthesis}, 
+     year={2017}, 
+     volume={5}, 
+     pages={18953-18974}, 
+     doi={10.1109/ACCESS.2017.2750923}, }
+
 
 Main sub-directories:
 * _cache_: header files declaring and defining the cache classes and their operators and methods.